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LTC3026 1.5A Low Input Voltage VLDO Linear Regulator FeaTures
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DescripTion
The LTC(R)3026 is a very low dropout (VLDOTM) linear regulator that can operate at input voltages down to 1.14V. The device is capable of supplying 1.5A of output current with a typical dropout voltage of only 100mV. To allow operation at low input voltages the LTC3026 includes a boost converter that provides the necessary headroom for the internal LDO circuitry. Output current comes directly from the input supply to maximize efficiency. The boost converter requires only a small chip inductor and ceramic capacitor for operation. Additionally, the boosted output voltage of one LTC3026 can supply the boost voltage for other LTC3026s, thus requiring a single inductor for multiple LDOs. A user supplied boost voltage can be used eliminating the need for an inductor altogether. The LTC3026 regulator is stable with 10F or greater ceramic output capacitors. The device has a low 0.4V reference voltage which is used to program the output voltage via two external resistors. The device also has internal current limit, overtemperature shutdown, and reverse output current protection. The LTC3026 is available in a small 10-lead MSOP or low profile (0.75mm) 10-lead 3mm x 3mm DFN package.
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Input Voltage Range: 1.14V to 3.5V (with Boost Enabled) 1.14V to 5.5V (with External 5V Boost) Low Dropout Voltage: 100mV at IOUT = 1.5A Adjustable Output Range: 0.4V to 2.6V Output Current: Up to 1.5A Excellent Supply Rejection Even Near Dropout Shutdown Disconnects Load from VIN and VBST Low Operating Current: IIN = 950A at VIN = 1.5V Low Shutdown Current: IIN < 1A (Typ), IBST = 0.1A (Typ) Stable with 10F or Greater Ceramic Capacitors Short-Circuit, Reverse Current Protected Overtemperature Protected Available in 10-Lead MSOP and 10-Lead (3mm x 3mm) DFN Packages
applicaTions
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High Efficiency Linear Regulator Post Regulator for Switching Supplies Microprocessor Supply
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and ThinSOT, VLDO are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
1.2V Output Voltage from 1.5V Input Supply
150 L1 10H SW 5V BOOST BST CONVERTER IN 4.7F 0.4V
Dropout Voltage vs Output Current
4.7F DROPOUT (mV)
100
VIN = 1.5V
+ -
1.2V 1.5V 2.0V 2.6V
OUT 8.06k
VOUT = 1.2V, 1.5A COUT 10F
50
OFF ON
SHDN LTC3026 GND
ADJ 100k PG
4.02k
3026 TA01a
0
0
0.5 IOUT (A)
1.0
1.5
3026 TA01b
L1: MURATA LQH2MCN100K02
3026fd
LTC3026 absoluTe MaxiMuM raTings
(Note 1)
VBST to GND ................................................. -0.3V to 6V VIN to GND ................................................... -0.3V to 6V PG to GND ................................................... -0.3V to 6V SHDN to GND............................................ -0.3V to 6.3V ADJ to GND................................... -0.3V to (VIN + 0.3V)
Output Short-Circuit Duration .......................... Indefinite Operating Junction Temperature Range (Note 8) .............................................-40C to 125C Storage Temperature Range................... -65C to 125C Lead Temperature (MSE, Soldering, 10 sec) ......... 300C
pin conFiguraTion
TOP VIEW IN IN GND SW BST 1 2 3 4 5 11 GND 10 OUT 9 OUT 8 ADJ 7 PG 6 SHDN TOP VIEW IN IN GND SW BST 1 2 3 4 5 11 GND 10 9 8 7 6 OUT OUT ADJ PG SHDN
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 40C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125C, JA = 40C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH LTC3026EDD#PBF LTC3026EMSE#PBF LEAD BASED FINISH LTC3026EDD LTC3026EMSE TAPE AND REEL LTC3026EDD#TRPBF LTC3026EMSE#TRPBF TAPE AND REEL LTC3026EDD#TR LTC3026EMSE#TR PART MARKING LBHW LTBJB PART MARKING LBHW LTBJB PACKAGE DESCRIPTION 10-Lead (3mm x 3mm) Plastic DFN 10-Lead Plastic MSOP PACKAGE DESCRIPTION 10-Lead (3mm x 3mm) Plastic DFN 10-Lead Plastic MSOP TEMPERATURE RANGE -40C to 125C -40C to 125C TEMPERATURE RANGE -40C to 125C -40C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3026fd
LTC3026 elecTrical characTerisTics
SYMBOL VIN IIN PARAMETER Operating Voltage Operating Current
(BOOST ENABLED, LSW = 10H) The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25C. VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 4.7F COUT = 10F (all capacitors ceramic) unless otherwise noted. ,
CONDITIONS (Note 2) IOUT = 0mA, VOUT = 0.8V, VSHDN = VIN, VIN = 1.2V IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 1.5V IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 2.5V IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 3.5V VSHDN = 0V, VIN = 3.5V
l l
MIN 1.14
TYP 1160 950 640 400 0.6
MAX 3.5
UNITS V A A A A
IINSHDN
Shutdown Current Inductor Size Requirement Inductor Peak Current Requirement
20 40 5.2 4.4
A H mA V V mA mA
4.7 150 VSHDN = VIN
l
10 5 4.2 7 10
VBST VBSTUVLO
Boost Output Voltage Range Boost Undervoltage Lockout Boost Output Drive (Note 3)
4.8 4.0
VIN < 1.4V VIN 1.4V
(BOOST DISABLED, VSW = 0V or Floating) The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25C. VIN = 1.5V, VOUT = 1.2V, VBST = 5V, CIN = CBST = 1F COUT = 10F (all capacitors ceramic) unless otherwise noted. ,
SYMBOL VIN IIN IINSHDN VBST VBSTUVLO IBST IBSTSHDN PARAMETER Operating Voltage Operating Current Shutdown Current Boost Operating Voltage (Note 7) Undervoltage Lockout Boost Operating Current Boost Shutdown Current IOUT = 100A, VSHDN = VIN VSHDN = 0V CONDITIONS (Note 2) IOUT = 100A, VSHDN = VIN, 1.2V VIN 5V VSHDN = 0V, VIN = 3.5V VSHDN = VIN
l l l l l l
MIN 1.14
TYP 95 0.6
MAX 5.5 200 20 5.5 4.4 275 5
UNITS V A A V V A A
4.5 4.0
5 4.25 175 1
(BOOST ENABLED or DISABLED) The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25C. VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 1F COUT = 10F (all capacitors ceramic) unless otherwise noted. ,
SYMBOL PARAMETER VADJ OUT IADJ IOUT ILIM en Regulation Voltage (Note 5) Programming Range Dropout Voltage (Note 6) ADJ Input Current Continuous Output Current Output Current Current Limit Output Voltage Noise f = 10Hz to 100kHz, IL = 800mA Boost Disabled Boost Enabled VIN = 1.5V, VADJ = 0.38, IOUT = 1.5A VADJ = 0.4V VSHDN = VIN CONDITIONS 1mA IOUT 1.5A, 1.14V VIN 3.5V, VBST = 5V, VOUT = 0.8V 1mA IOUT 1.5A, 1.14V VIN 3.5V, VBST = 5V, VOUT = 0.8V
l l l l l
MIN 0.397 0.395 0.4
TYP 0.4 0.4 100
MAX 0.403 0.405 2.6 250 100
UNITS V V V mV nA A A VRMS VRMS
-100 1.5 3 110 210
3026fd
LTC3026 elecTrical characTerisTics
SYMBOL PARAMETER VIHSHDN VILSHDN IIHSHDN IILSHDN VOLPG IOHPG PG SHDN Input High Voltage SHDN Input Low Voltage SHDN Input High Current SHDN Input Low Current PG Output Low Voltage Output Threshold (Note 4) CONDITIONS 1.14V VIN 3.5V 3.5V VIN 5.5V 1.14V VIN 5.5V SHDN = VIN SHDN = 0V IPG = 2mA PG High to Low PG Low to High
l l l l
(BOOST ENABLED or DISABLED) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25C. VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 1F COUT = 10F (all capacitors ceramic) unless otherwise noted. ,
MIN 1.0 1.2 0.4 -1 -1 0.1 0.01 -12 -10 -9 -7 1 1 0.4 1 -6 -4 TYP MAX UNITS V V V A A V A % %
PG Output High Leakage Current VPG = 5.5V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. This IC has overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 125C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 2: Minimum Operating Voltage required for regulation is: VIN VOUT(MIN) + VDROPOUT Note 3: When using BST to drive loads other than LTC3026s, the load must be high impedance during start-up (i.e. prior to PG going high). Note 4: PG threshold expressed as a percentage difference from the "VADJ Regulation Voltage" as given in the table. Note 5: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. Note 6: Dropout voltage is minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to VIN - VDROPOUT. Note 7: To maintain correct regulation VOUT VBST - 2.4V Note 8: The LTC3026E is guaranteed to meet performance specifications from 0C to 125C. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3026I is guaranteed over the full -40C to 125C operating junction temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors.
Typical perForMance characTerisTics
IN Supply Current with Boost Converter Enabled
1.50 1.25 INPUT CURRENT (mA) 150 1.00 IBST (A) 0.75 0.50 0.25 0 -40C 25C 85C 1.0 1.5 2.0 2.5 VIN (V) 3.0 3.5
3026 G01
BST Supply Current with Boost Converter Disabled
200 200
IN Supply Current with Boost Converter Disabled
150 IIN (A)
100 VBST = 5V -40C 25C 85C 125C
100 VBST = 5V -40C 25C 85C 125C
50
50
0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)
3026 G02
0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)
3026 G03
3026fd
LTC3026 Typical perForMance characTerisTics
ADJ Voltage vs Temperature
404 403 ADJUST VOLTAGE (mV) INPUT CURRENT (A) 402 401 400 399 398 397 396 -50 -25 0 25 50 VBST = 5V VIN = 1.5V VOUT =1.2V 75 TEMPERATURE (C) 100 125
3026 G04
IN Shutdown Current
5.0 4.5 4.0 BST VOLTAGE (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -50 2.5V -25 0 25 50 75 TEMPERATURE (C) 1.2V 100 125
3026 G05
BST Voltage vs Temperature
5.050 VIN = 1.5V
5.025
1mA 1.5A
5.000
3.5V
4.975
4.950 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
3026 G06
Dropout Voltage vs Input Voltage
200 180 160 RIPPLE REJECTION (dB) DROPOUT (mV) 140 120 100 80 60 40 20 0 1.2 1.4 1.6 1.8 2.0 2.2 -40C 25C 85C 125C 2.4 2.6
3026 G07
Ripple Rejection
60 10kHz 50 40 30 20 10 0 1.2 VBST = 5V VOUT =1.2V IOUT = 800mA COUT = 10F 1.4 1.6 1.8 2.0 VIN (V) 2.2 2.4 2.6
3026 G08
Ripple Rejection
70 60 RIPPLE REJECTION (dB) 50 40 30 20 10 0 100 1000 VBST = 5V VIN = 1.5V VOUT =1.2V IOUT = 800mA COUT = 10F 10000 100000 1000000 1E+07 FREQUENCY (Hz)
3026 G09
VFB = 0.38V IOUT =1.5A
1MHz 100kHz
VIN (V)
Shutdown Threshold
1200 RISE RISE FALL FALL RISE FALL 600 -40C 25C 125C 1 2 3 VIN (V) 4 5 6
3026 G10
Output Current Limit
5.0 4.5 4.0 3.5 IOUT (A) 3.0 2.5 2.0 1.5 1.0 1.0 1.5 2.0 CURRENT LIMIT THERMAL LIMIT VBST - VOUT (V) VOUT = 0V TA = 25C 2.22 2.20 2.18 2.16 2.14 2.12 2.10 2.08 2.06 2.04 2.5 VIN (V) 3.0 3.5
3026 G11
BST to OUT Headroom Voltage
VSHDN THRESHOLD (mV)
900
300
2.02 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
3026 G12
3026fd
LTC3026 Typical perForMance characTerisTics
Delay from Enable to PG with Boost Disabled
400 375 350 DELAY (s) 325 300 275 250 VOUT = 0.8V ROUT = 8 -40C 25C 85C 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)
3026 G13
Delay from Enable to PG with Boost Enabled
5.0 4.5 4.0 3.5 DELAY (ms) 3.0 2.5 2.0 1.5 1.0 0.5 0 1.0 1.5 2.5 2.0 VIN (V) 3.0 3.5
3026 G14
Output Load Transient Response
1.5A IOUT 2mA
VOUT = 0.8V ROUT = 8 -40C 25C 85C
OUT AC 20mV/DIV
VOUT = 1.5V COUT = 10F VIN = 1.7V VBST = 5V
50s/DIV
3026 G15
IN Supply Transient Response
SHDN 2V VIN 1.5V BST 1V 1.5V OUT 0V HI LO 5V
BST/OUT Start-Up
BST Ripple and Feedthrough to OUT
VBST AC 20mV/DIV
VOUT AC 10mV/DIV
VOUT AC 5mV/DIV
VOUT = 1.2V IOUT = 800mA COUT = 10F VBST = 5V TA = 25C
10s/DIV
3026 G16
TA = 25C ROUT = 1 VIN = 1.7V
200s/DIV
3026 G17
VOUT = 1.2V VIN = 1.5V IOUT = 1A COUT = 10F LSW = 10H TA = 25C
20s/DIV
3026 G18
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LTC3026 pin FuncTions
IN (Pins 1, 2): Input Supply Voltage. Output load current is supplied directly from IN. The IN pin should be locally bypassed to ground if the LTC3026 is more than a few inches away from another source of bulk capacitance. In general, the output impedance of a battery rises with frequency, so it is usually advisable to include an input bypass capacitor when supplying IN from a battery. A capacitor in the range of 0.1F to 4.7F is usually sufficient. GND (Pin 3, Exposed Pad Pin 11): Ground and Heat Sink. Connect the exposed pad to the PCB ground plane or large pad for optimum thermal performance. SW (Pin 4): Boost Switching Pin. This is the boost converter switching pin. A 4.7H to 40H inductor able to handle a peak current of 150mA is connected from this pin to VIN. The boost converter can be disabled by floating this pin or shorting this pin to GND. This allows the use of an external boosted supply from a second LTC3026 or other source. See Operating with Boost Converter Disabled section for more information. BST (Pin 5): Boost Output Voltage Pin. With boost converter enabled bypass the BST pin with a 4.7F low ESR ceramic capacitor to GND (CBST). BST does not load VIN when in shutdown, but is diode connected to IN through the external inductor, thus, will not go to ground with VIN present. Users should not present any loads to the BST pin (with boost enabled) until PG signals that regulation has been achieved. When providing an external BST voltage (i.e. boost converter disabled) a 1F low ESR ceramic capacitor can be used. SHDN (Pin 6): Shutdown Input Pin, Active Low. This pin is used to put the LTC3026 into shutdown. The SHDN pin current is typically less than 10nA. The SHDN pin cannot be left floating and must be tied to a valid logic level (such as IN) if not used. PG (Pin 7): Power Good Pin. When PG is high impedance OUT is in regulation, and low impedance when OUT is in shutdown or out of regulation. ADJ (Pin 8): Output Adjust Pin. This is the input to the error amplifier. It has a typical bias current of 0.1nA flowing into the pin. The ADJ pin reference voltage is 0.4V referenced to ground. The output voltage range is 0.4V to 2.6V and is typically set by connecting ADJ to a resistor divider from OUT to GND. See Figure 2. OUT (Pins 9, 10): Regulated Output Voltage. The OUT pins supply power to the load. A minimum output capacitance of 5F is required to ensure stability. Larger output capacitors may be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance.
3026fd
LTC3026 block DiagraM
SW
4
BOOST CONVERTER
5 BST
SHDN
6
SWITCHING LOGIC
EN
SHDN
0.4V REFERENCE UVLO VOFF
+ - -
0.372V
-
PG
7
+- +
OVERSHOOT DETECT
- +
IN 1,2 OUT 9,10 8 ADJ GND 3,11
3026 BD
+
3026fd
LTC3026 operaTion
The LTC3026 is a VLDO (very low dropout) linear regulator which operates from input voltages as low as 1.14V. The LDO uses an internal NMOS transistor as the pass device in a source-follower configuration. The BST pin provides the higher supply necessary for the LDO circuitry while the output current comes directly from the IN input for high efficiency regulation. The BST pin can either be supplied off-chip by an external 5V source or it can be generated through the internal boost converter of the LTC3026. Boost Converter Operation For applications where an external 5V supply is not available, the LTC3026 contains an internal boost converter to produce the necessary 5V supply for the LDO. The boost converter utilizes Burst Mode(R) operation to achieve high efficiency for the relatively low current levels needed for the LDO circuitry. The boost converter requires only a small chip inductor between the IN and SW pins and a small 4.7F capacitor at BST. The operation of the boost converter is described as follows. During the first half of the switching cycle, an internal NMOS switch between SW and GND turns on, ramping the inductor current. A peak comparator senses when the inductor current reaches 100mA, at which point the NMOS is turned off and an internal PMOS between SW and BST turns on, transferring the inductor current to the BST pin. The PMOS switch continues to deliver power to BST until the inductor current approaches zero, at which point the PMOS turns off and the NMOS turns back on, repeating the switching cycle. A burst comparator with hysteresis monitors the voltage on the BST pin. When BST is above the upper threshold of the comparator, no switching occurs. When BST falls below the comparator's lower threshold, switching commences and the BST pin gets charged. The upper and lower thresholds of the burst comparator are set to maintain a 5V supply at BST with approximately 40mV to 50mV of ripple. Care must be taken not to short the BST pin to GND, since the body diode of the internal PMOS transistor connects the BST and SW pins. Shorting BST to GND with an inductor connected between IN and SW can ramp the inductor current to destructive levels, potentially destroying the inductor and/or the part. Operating with Boost Converter Disabled The LTC3026 has an option to disable the internal boost converter. With the boost converter disabled, the LTC3026 becomes a bootstrapped device and the BST pin must be driven by an external 5V supply, or driven by the BST pin of a second LTC3026 with the boost converter enabled. The recommended method for disabling the boost converter is to simply float the SW pin. With the SW pin floating no energy can be transferred to BST which effectively disables the boost converter. A second method for disabling the boost converter is to short SW to GND. Shorting SW to GND to disable the boost converter should only be used in cases where IN is in its specified operating range when the LTC3026 is enabled. Enabling the part before VIN is in its operating range can cause current to be pulled off BST with the SW pin grounded. This can cause current limited supplies to hang under the right conditions. Connecting SHDN to IN will enable the part before IN is in its specified operating range. With SHDN connected to IN the SW pin should be floated to disable the boost converter. Either method of disabling the boost converter may be used if the signal driving the SHDN pin is high only when IN is in its specified operating range. Connecting SHDN to the power good pin of the supply driving IN is one method that allows both disable methods to be used. A single LTC3026 boost converter can be used to drive multiple bootstrapped LTC3026s with the internal boost converters disabled. Thus a single inductor can be used to power two (or possibly more) functioning LTC3026s. In cases where all LTC3026s have the same input supply (IN) the internal boost converters of the bootstrapped LTC3026s can be disabled by shorting SW to GND or floating the SW pin. If the LTC3026s are not all connected to the same input supply then the internal boost converters of the bootstrapped LTC3026s are disabled by floating the SW pin. If there is ever a doubt about which method to use remember that it is always safe to float the SW pin to disable the boost converter. There is no noticeable difference in performance of the part regardless of which disable method is used.
3026fd
LTC3026 operaTion
LDO Operation An undervoltage lockout comparator (UVLO) senses the BST pin voltage to ensure that the bias supply for the LDO is greater than 4.2V before enabling the LDO. If BST is below 4.2V, the UVLO shuts down the LDO, and OUT is pulled to GND through the external divider. The LDO provides a high accuracy output capable of supplying 1.5A of output current with a typical dropout voltage of only 100mV. A single ceramic capacitor as small as 10F is all that is required for output bypassing. A low reference voltage allows the LTC3026 output to be programmed to much lower voltages than available in common LDOs (range of 0.4V to 2.6V). The devices also include current limit and thermal overload protection, and will survive an output short-circuit indefinitely. The fast transient response of the follower output stage overcomes the traditional trade-off between dropout voltage, quiescent current and load transient response inherent in most LDO regulator architectures, see Figure 1.
1.5A IOUT 0mA
the LDO reference voltage from 0V to 0.4V over a period of approximately 200s, see Figure 2.
SHDN HI LO 1.5V OUT 0V 1.5V PG 0V TA = 25C ROUT = 1 VIN = 1.7V VB = 5V 100s/DIV
3026 F02
Figure 2. Soft-Start with Boost Disable
Adjustable Output Voltage The output voltage is set by the ratio of two external resistors as shown in Figure 3. The device servos the output to maintain the ADJ pin voltage at 0.4V (referenced to ground). Thus, the current in R1 is equal to 0.4V/R1. For good transient response, stability and accuracy the current in R1 should be at least 80A, thus, the value of R1 should be no greater than 5k. The current in R2 is the current in R1 plus the ADJ pin bias current. Since the ADJ pin bias current is typically <10nA it can be ignored in the output voltage calculation. The output voltage can be calculated using the formula in Figure 3. Note that in shutdown the output is turned off and the divider current will be zero once COUT is discharged.
VOUT LTC3026 ADJ R1 GND
3026 F03
OUT AC 20mV/DIV
VOUT = 1.5V COUT = 10F VIN = 1.7V VB = 5V
100s/DIV
3026 F01
VOUT R2 COUT
0.4V 1
R2 R1
Figure 1. Output Load Step Response
The LTC3026 also includes a soft-start feature to prevent excessive current flow at VIN during start-up. When the LDO is enabled, the soft-start circuitry gradually increases
Figure 3. Programming the LTC3026
3026fd
0
LTC3026 operaTion
The LTC3026 operates at a relatively high gain of 270V/A referred to the ADJ input. Thus, a load current change of 1mA to 1.5A produces a 400V drop at the ADJ input. To calculate the change in the output, simply multiply by the gain of the feedback network (i.e. 1 + R2/R1). For example, to program the output for 1.2V choose R2/R1 = 2. In this example an output current change of 1mA to 1.5A produces -400V * (1 + 2) = 1.2mV drop at the output. Power Good Operation The LTC3026 includes an open-drain power good (PG) output pin with hysteresis. If the chip is in shutdown or under UVLO conditions (VBST < 4.25V), PG is low impedance to ground. PG becomes high impedance when VOUT rises to 93% of its regulation voltage. PG stays high impedance until VOUT falls back down to 91% of its regulation value. A pull-up resistor can be inserted between PG and a positive logic supply (such as IN, OUT, BST, etc.) to signal a valid power good condition. VIN should be the minimum operating voltage (1.14V) or greater for PG to function correctly. Output Capacitance and Transient Response The LTC3026 is designed to be stable with a wide range of ceramic output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. An output capacitor of 10F or greater with an ESR of 0.05 or less is recommended to ensure stability.
20 0 CHANGE IN VALUE (%) -20 -40 -60 Y5V -80 -100
The LTC3026 is a micropower device and output transient response will be a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Note that bypass capacitors used to decouple individual components powered by the LTC3026 will increase the effective output capacitor value. High ESR tantalum and electrolytic capacitors may be used, but a low ESR ceramic capacitor must be in parallel at the output. There is no minimum ESR or maximum capacitor size requirements. Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 4 and 5. When used with a 2V regulator, a 10F Y5V capacitor can exhibit an effective value as low as 1F to 2F over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. A minimum capacitance of 5F must be maintained at all times on the LTC3026 LDO output.
BOTH CAPACITORS ARE 10F, 6.3V, 0805 CASE SIZE CHANGE IN VALUE (%) X5R
20 0 -20 Y5V -40 -60 -80 X5R
0
1
2 3 4 DC BIAS VOLTAGE (V)
5
6
3026 F04
-100 -50
BOTH CAPACITORS ARE 10F, 6.3V, 0805 CASE SIZE -25 50 25 0 TEMPERATURE (C) 75
3026 F05
Figure 4. Ceramic Capacitor DC Bias Characteristics
Figure 5. Ceramic Capacitor Temperature Characteristics
3026fd
LTC3026 operaTion
Boost Converter Component Selection A 10H chip inductor with a peak saturation current (ISAT) of at least 150mA is recommended for use with the internal boost converter. The inductor value can range between 4.7H to 40H, but values less than 10H result in higher switching frequency, increased switching losses, and lower max output current available at the BST pin. See Table 1 for a list of component suppliers.
Table 1. Inductor Vendor Information
SUPPLIER Coilcraft Murata Taiyo Yuden TDK PART NUMBER 0603PS-103KB LQH2MCN100K02 LB2016T100M NLC252018T-100K WEBSITE www.coilcraft.com www.murata.com www.t-yuden.com www.TDK.com
For surface mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through holes can also be used to spread the heat generated by power devices. A junction-to-ambient thermal coefficient of 40C/W is achieved by connecting the exposed pad of the MSOP or DFN package directly to a ground plane of about 2500mm2. Calculating Junction Temperature Example: Given an output voltage of 1.2V, an input voltage of 1.8V 4%, an output current range of 0mA to 1A and a maximum ambient temperature of 50C, what will the maximum junction temperature be? The power dissipated by the device will be approximately: IOUT(MAX)(VIN(MAX) - VOUT) where: IOUT(MAX) = 1A VIN(MAX) = 1.87V so: P = 1A(1.87V - 1.2V) = 0.67W Even under worst-case conditions LTC3026's BST pin power dissipation is only about 1mW, thus can be ignored. The junction to ambient thermal resistance will be on the order of 40C/W. The junction temperature rise above ambient will be approximately equal to: 0.67W(40C/W) = 26.8C The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: TA = 26.8C + 50C = 76.8C Short-Circuit/Thermal Protection The LTC3026 has built-in output short-circuit current limiting as well as overtemperature protection. During short-circuit conditions, internal circuitry automatically
It is also recommended that the BST pin be bypassed to ground with a 4.7F or greater ceramic capacitor. Larger values of capacitance will not reduce the size of the BST ripple much, but will decrease the ripple frequency proportionally. The BST pin should maintain 1F of capacitance at all times to ensure correct operation (See the "Output Capacitance and Transient Response" section about capacitor selection). High ESR tantalum and electrolytic capacitors may be used, but a low ESR ceramic must be used in parallel for correct operation. Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125C). The majority of the power dissipated in the device will be the output current multiplied by the input/output voltage differential: (IOUT)(VIN - VOUT). Note that the BST current is less than 200A even under heavy loads, so its power consumption can be ignored for thermal calculations. The LTC3026 has internal thermal limiting designed to protect the device during momentary overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered.
3026fd
LTC3026 operaTion
limits the output current to approximately 3A. At higher temperatures, or in cases where internal power dissipation cause excessive self heating on-chip, the thermal shutdown circuitry will shut down the boost converter and LDO when the junction temperature exceeds approximately 150C. It will reenable the converter and LDO once the junction temperature drops back to approximately 140C. The LTC3026 will cycle in and out of thermal shutdown without latchup or damage until the overstress condition is removed. Long term overstress (TJ > 125C) should be avoided as it can degrade the performance or shorten the life of the part. Reverse Input Current Protection The LTC3026 features reverse input current protection to limit current draw from any supplementary power source at the output. Figure 6 shows the reverse output current limit for constant input and output voltages cases. Note: Positive input current represents current flowing into the VIN pin of LTC3026. With VOUT held at or below the output regulation voltage and VIN varied, IN current flow will follow Figure 6's curves. IIN reverse current ramps up to about 16A as the VIN approaches VOUT. Reverse input current will spike up as VIN approaches within about 30mV of VOUT as the reverse current protection circuitry is disabled and normal operation resumes. As VIN transitions above VOUT the reverse current transitions into short-circuit current as long as VOUT is held below the regulation voltage.
30 20 IIN CURRENT (A) 10 0 LSW -10 -20 -30 IN CURRENT LIMIT ABOVE 1.45V CIN 1 IN 2 IN 3 GND 4 SW 5 BST 0 0.3 0.9 0.6 1.2 INPUT VOLTAGE (V) 1.5 1.8
3026 F06
Layout Considerations Connection from BST and OUT pins to their respective ceramic bypass capacitor should be kept as short as possible. The ground side of the bypass capacitors should be connected directly to the ground plane for best results or through short traces back to the GND pin of the part. Long traces will increase the effective series ESR and inductance of the capacitor which can degrade performance. With the boost converter enabled, the SW pin will be switching between ground and 5V whenever the BST pin needs to be recharged. The transition edge rates of the SW pin can be quite fast (~10ns). Thus care must be taken to make sure the SW node does not couple capacitively to other nodes (especially the ADJ pin). Additionally, stray capacitance to this node reduces the efficiency and amount of current available from the boost converter. For these reasons it is recommended that the SW pin be connected to the switching inductor with as short a trace as possible. If the user has any sensitive nodes near the SW node, a ground shield may be placed between the two nodes to reduce coupling. Because the ADJ pin is relatively high impedance (depending on the resistor divider used), stray capacitance at this pin should be minimized (<10pF) to prevent phase shift in the error amplifier loop. Additionally special attention should be given to any stray capacitances that can couple external signals onto the ADJ pin producing undesirable output ripple. For optimum performance connect the ADJ pin to R1 and R2 with a short PCB trace and minimize all other stray capacitance to the ADJ pin.
COUT OUT 10 OUT 9 ADJ 8 PG 7 SHDN 6 R1 R2
CBST
3026 F07
VIA CONNECTION TO GND PLANE
Figure 6. Input Current vs Input Voltage
Figure 7. Suggested Layout
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LTC3026 Typical applicaTions
Using 1 Boost with Multiple Regulators
VIN = 2.5V TO ADDITIONAL REGULATORS SW LTC3026 IN OUT 14k SHDN 4.7F GND PG ADJ 100k 4.02k PG1 COUT1 10F 1F GND PG SHDN ADJ 100k 4.02k PG2 BST 4.7F VOUT1 1.8V, 1.5A IN SW* LTC3026 OUT 11k COUT2 10F BST 1F VOUT2 1.5V, 1.5A
10H
LTC3026 WITH BOOST ENABLED FANOUT: 3-LTC3026 FOR VIN <1.4V 5-LTC3026 FOR VIN >1.4V
BOOT STRAPPED LTC3026 (BOOST DISABLED)
3026 TA02
* THE SW PIN OF BOOTSTRAPPED LTC3026 SHOULD BE FLOATED (DISCONNECTED FROM GND) IN CASES WHERE THE BOOTSTRAPPED LTC3026 DOES NOT SHARE THE SAME INPUT SUPPLY (IN) AS THE BOOSTING LTC3026.
2.5V Output from 3.3V Supply with External 5V Bias
VBIAS = 5V N/C VIN = 3.3V SW* LTC3026 IN OUT 21k SHDN 1F GND PG ADJ 100k 4.02k PG COUT 10F BST 1F VOUT 2.5V, 1.5A
3026 TA03
* SEE OPERATING WITH BOOST CONVERTER DISABLED SECTION FOR INFORMATION ON DISABLING BOOST CONVERTER.
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LTC3026 package DescripTion
MSE Package 10-Lead Plastic MSOP Exposed Die Pad ,
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF EXPOSED PAD OPTION
2.794 (.110
0.102 .004)
0.889 (.035
0.127 .005)
1
2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004) 0.05 REF
0.29 REF
5.23 (.206) MIN
2.083 (.082
0.102 3.20 - 3.45 .004) (.126 - .136)
10
DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 0.497 0.076 (.0196 .003) REF
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102 (.118 .004) (NOTE 3)
10 9 8 7 6
4.90 0.152 (.193 .006) 0.254 (.010)
GAUGE PLANE DETAIL "A" 0 - 6 TYP
3.00 0.102 (.118 .004) (NOTE 4)
12345 0.53 0.152 (.021 .006)
DETAIL "A"
1.10 (.043) MAX
0.86 (.034) REF
0.18 (.007)
SEATING PLANE
0.50 (.0197) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.17 - 0.27 (.007 - .011) TYP
0.1016 (.004
0.0508 .002)
MSOP (MSE) 0908 REV C
3026fd
LTC3026 package DescripTion
(Reference LTC DWG # 05-08-1669 Rev B)
DD Package 10-Lead Plastic DFN (3mm x 3mm)
0.70 0.05
3.55 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05
0.50 BSC 2.38 0.05 (2 SIDES) R = 0.125 TYP 6 0.40 10 0.10
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6)
1.65 0.10 (2 SIDES)
5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1
(DD) DFN REV B 0309
0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3026fd
LTC3026 revision hisTory
REV D DATE 3/10 DESCRIPTION Addition to Absolute Maximum Ratings Changes to Electrical Characteristics Changes to Pin Functions Changes to Operation Section Changes to Typical Applications Additions to Related Parts
(Revision history begins at Rev D)
PAGE NUMBER 1 3, 4 7, 9 14, 18 18
3026fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3026 Typical applicaTion
4.5V VIN 5.5V
Efficient, Low Noise 1.5V Output from 1.8V DC/DC Buck Converter (LTC3026 Boost Converter Disabled)
33pF 200pF
30k 0.1F
1 2 3 4
ITH LTC1773 RUN/SS SYNC/FCB VFB GND
SW SENSE- VIN TG BG
10 9 8 7 6
RSENSE 0.04
L1 2.5H
VBUCK 1.8V N/C 2A
1F SW LTC3026 IN SHDN OUT 11k ADJ 100k GND PG
3026 TA04
BST VOUT 1.5V 1.5A COUT 10F PG
CIN 47F 10V
5
Si9942DY 80.6k 1% 100k 1% CIN, CBUCK: TAIYO YUDEN LMK550BJ476MM L1: CDRH5D28 RSENSE: IRC LR1206-01-R040-F CBUCK 47F 10V
1F
4.02k
relaTeD parTs
PART NUMBER LT1761 LT1762 LT1763 LT1764A LT1844 LT1962 LT1963A LT1964 LT1965 LTC3025 LT3080/LT3080-1 DESCRIPTION 100mA, Low Noise LDO in ThinSOTTM 150mA, Low Noise LDO 500mA, Low Noise LDO 3A, Fast Transient Response, Low Noise LDO 150mA, Very Low Dropout LDO 300mA, Low Noise LDO COMMENTS 300mV Dropout Voltage, Low Noise: 20VRMS, VIN = 1.8V to 20V, ThinSOT Package 300mV Dropout Voltage, Low Noise: 20VRMS, VIN = 1.8V to 20V, MS8 Package 300mV Dropout Voltage, Low Noise: 20VRMS, VIN = 1.8V to 20V, SO-8 Package 340mV Dropout Voltage, Low Noise: 40VRMS, VIN = 2.7V to 20V, TO-220 and DD Packages 80mV Dropout Voltage, Low Noise <30VRMS, VIN = 1.6V to 6.5V, Stable with 1F Output Capacitors, ThinSOT Package 270mV Dropout Voltage, Low Noise 20VRMS, VIN = 1.8V to 20V, MS8 Package
1.5A Low Noise, Fast Transient Response LDO 340mV Dropout Voltage, Low Noise: 40VRMS, VIN = 2.5V to 20V, TO-220, DD, SOT-223 and SO-8 Packages 200mA, Low Noise, Negative LDO 1.1A, Low Noise, Low Dropout Linear Regulator 300mA Micropower VLDO Linear Regulator 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator Fast Transient Response, VLDO Regulator Controller 340mV Dropout Voltage, Low Noise 30VRMS, VIN = -1.8V to -20V, ThinSOT Package 290mV Dropout Voltage, Low Noise 40VRMS, VIN = 1.8V to 20V, TO-220, DDPak, MSOP and 3mm x 3mm DFN Packages 45mV Dropout Voltage, Low Noise 80VRMS, VIN = 0.9V to 5.5V, Low IQ: 54A, 2mm x 2mm 6-Lead DFN Package 300mV Dropout Voltage (2 Supply), Low Noise 40VRMS, VIN = 1.2V to 36V, VOUT = 0V to 35.7V, Directly Parallelable, TO-220, SOT-223, MSOP-8 and 3mm x 3mm DFN Packages 0.035mV Dropout Voltage via External FET, VIN = 1.3V to 10V
LT3150
3026fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 0310 REV D * PRINTED IN USA
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2005

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